From chaos theory to silicon cores

I am a system design engineer focused on the parts of modern processors that most people never see: microcode, security mitigations, and the validation infrastructure that keeps complex silicon trustworthy. My work spans owning CPU-core microcode features end to end and building automation that turns weeks of manual effort into minutes.

Before my current work on high-performance CPU cores, I helped bring up AI inference accelerators and led power, performance, and stability validation across large data-center clusters - experiences that shaped how I think about scale, reliability, and customer impact.

My academic research explored chaos-based encryption for resource-constrained devices, supported by national funding. That work produced peer-reviewed publications, FPGA and CMOS demonstrators, and a lasting interest in the intersection of hardware design and security.