Peer Reviewer - IEEE Access
2025 - PresentIEEE Access
Invited repeatedly as an expert reviewer; completed 35+ journal reviews across hardware security, processor architecture, FPGA systems, and cryptographic implementations.
Peer review, program committees, university advisory work, and mentoring the next generation of engineers.
IEEE Access
Invited repeatedly as an expert reviewer; completed 35+ journal reviews across hardware security, processor architecture, FPGA systems, and cryptographic implementations.
IEEE Embedded Systems Letters
Invited by the Associate Editor to review multiple submitted manuscripts for the journal's embedded systems and hardware track.
IEEE Micro
Invited reviewer for IEEE Micro, providing technical and editorial feedback on a submitted manuscript.
Asia Pacific Conference on Circuits and Systems
Reviewed multiple submitted papers on integrated circuits, digital systems, embedded computing, and hardware design methodologies.
Dallas Circuits and Systems Conference
Domain-expert reviews of TinyML FPGA pre-distortion and area-efficient filter designs, evaluating optimization and synthesis trade-offs.
Green Energy and Smart Systems Conference
Served as a TPC member reviewing work on enterprise security and network function virtualization.
Green Energy and Sustainable Systems Conference
Serving on the Technical Program Committee; completed reviews for multiple submitted manuscripts in sustainable systems and emerging technologies.
Midwest Symposium on Circuits and Systems
Invited to chair a technical session and serve on the program committee for one of IEEE's flagship Circuits and Systems Society conferences.
California State University, Sacramento
Provide industry guidance on curriculum development, workforce readiness, emerging technology trends, and industry-academia collaboration.
California State University, Sacramento
Nominated as a candidate for Chair of the Industry Advisory Council, representing industry stakeholders and program growth.
CSULB Graduate Mentor Program
Mentored 30+ students, supporting their academic and early-career development.
International design automation conference
Selected to present a tutorial on post-silicon validation, system-on-chip security, and performance optimization in modern processors.
I mentor students and early-career engineers at no cost. Book a session and let's talk about your goals in silicon, security, or research.